Network elements must meet certain frequency, phase, and time requirements to ensure proper end-to-end network operation. Synchronization architectures defined by the O-RAN alliance dictate how Open RAN equipment can meet these requirements. Open RAN continues to attract interest from service providers looking to reduce cost, improve competition, and drive technology innovation. The desire for a…
IMS 2022 video: Analog Devices
Analog Devices demonstrated its ADF4377 Microwave Wideband Synthesizer with Integrated VCO at IMS 2022.
Oscillator shrinks size and power
The Elite X Super-TCXO from SiTime provides stable timing from 1 MHz to 60 MHz for edge computing, vehicles, and cellular base stations.
Timing IC combines functions for Open RAN
Microchip’s ZL30735 integrates eight DPLLs, five low-output jitter synthesizers, and an IEEE 1588-2008 protocol stack. The splitting of radio access network functions creates an Open RAN that promises greater innovation and features in 5G networks. Splitting the traditional baseband unit into radio units (RU), distribution units (DU) and centralized units (CU) brings timing issues not…
Meet timing requirements in 5G networks
5G needs tighter timing requirements than do 4G networks. The timing must perpetuate from the radio throughout the telecom network core.
How timing sources synchronize open RAN networks
IEEE 1588 PTP and SyncE protocols keep radio units, switches, and distribution units in sync.
Renesas adds three timing ICs for 4G/5G radios
The 8V19N850 radio synchronizer and 8V19N880/8V19N882 jitter attenuators enhance a radio unit’s timing capabilities.
MEMS resonator integrates with oscillator circuits
SiTime has entered the resonator market with a MEMs device that can be integrated into semiconductor devices and oscillator modules.
MEMS oscillator boasts 70 fsec phase noise
The SiT9501 from SiTime can reduce noise and jitter in network communications.
5G runs hot, oscillator can take it
Two OCXO’s from Sunstu Electronics can operate at temperatures up to 95°C.