Designers under pressure to deliver new features to voracious mobile markets are taking advantage of new sub-chipscale package technology to build new designs ahead of the curve using standard ICs.
Market Demands for Mobile Functionality
Mobile penetration has reached a high level in developed markets and is increasing in other areas around the world. According to information from the GSMA, leading European nations now have over 90% subscriber penetration. Developing markets are set to rise from an average penetration level of 39% in 2012 to 47% in 2017, and will be the largest factor spurring the global growth of mobile over the next five years. As markets grow around the world, introducing billions of new users to the personal and economic opportunities brought by mobile connectivity, demands for extra features and greater value for money can only increase.
Mobile Trends and Design
Today’s mobile buyers are looking for large-screen experiences from lightweight, ultra-portable and stylish devices. To meet this demand, the large high-definition touchscreens occupy almost the entire front panel area of smartphones, tablets and hybrid “phablet” devices. To achieve the desirable slim outline, designers must pay careful attention to the height of electronic components inside the enclosure. Moreover, intense usage of devices for web browsing, photography, sharing pictures, gaming and listening to music, in addition to calling and texting, demands extra battery energy. Using current battery technologies this can only be satisfied by fitting a larger battery, which places an extra premium on real-estate inside the device.
At the same time, device designers must offer more and more functionality to compete against other products in the marketplace. Buyers are attracted by new features, such as a better camera, better games demanding larger memory, high-speed connectivity to peripherals such as external screens or drives, and context-sensitive capabilities. Ideally, demands such as these should be addressed by migrating to the next-generation chipset. However, consumer market demands tend to outstrip the pace of IC development; new products must be delivered well before new baseband chipsets integrating the required features are available.
Ideal versus Deliverable
Although an integrated solution is preferable, and is clearly the most space efficient approach, designers must find a way of implementing the required functionality within an acceptable PCB area using components that are currently available. This inevitably calls for the use of several standard ICs. ON Semiconductor produces a variety of standard ICs for mobile applications, such as single-chip class-D amplifiers, LED-backlight controllers, dedicated audio management ICs, and devices for filtering, port sharing, I/O protection and active EMI management.
To complete designs using multiple standard ICs, designers need highly miniaturized components such as small-signal MOSFETs and chip resistors for duties such as load switching, off-chip interfacing (figure 1) level translate (figure 2) and high-side load switch with level shift (figure 3) In order to yield successful results, these components should have the smallest PCB footprint and lowest mounted height possible.
Figure 1. Small-signal MOSFETs in interface-switching circuitry.
Figure 2. Using MOSFETs for level translate.
Figure 3. Using MOSFETs for high side load switch with level shift.
As far as passives such as chip resistors are concerned, miniaturization has delivered resistor-array devices combining multiple resistors in a single device, as well as discrete components in tiny 0402, 0201 or 01005 SMD packages. Miniaturizing MOSFETs, however, is generally more challenging; MOSFETs are designed with reference to several conflicting parameters; achieving low on-resistance, to minimize energy losses in switching applications, is difficult to achieve in a device that is physically small and capable of fast, efficient switching. To achieve this combination of qualities, the device must have a small die size with high cell density as well as low capacitance and low gate charge.
Miniaturising MOSFETs for Mobiles
Generally, a number of design avenues are applicable. Designers of power MOSFETs tend towards super junction, deep trench, or other advanced trench technologies to achieve low on-resistance with high-voltage capability and low die size. In small-signal MOSFETs, such as those used for load switching and interfacing at low operating voltages such as 2.5V or 1.8V in mobile devices, other technologies must be pursued to reduce package size and the on-resistance per die size. In fact, on-resistance per die size is the really crucial metric for MOSFETs that are predominantly used for load switching type applications.
The latest generations of small-signal MOSFETs are designed with low threshold voltage, and are specified at gate-drive voltage down to 1.5V. This allows the devices to achieve very low on-resistance in portable applications operating at low voltages derived from Li-ion battery voltages.
To maximize the advantages of the small die sizes these devices are able to achieve, they have been offered in a choice of ultra-small packages from the SOT-563 measuring 1.6 x 1.6 x 0.5mm to SOT-883 measuring 1.0 x 0.6 x 0.4mm. The most recent devices, such as ON Semiconductor’s N-channel NTNS3193NZ and P-channel NTNS3A91PZ, take this miniaturization a step further by taking advantage of the latest eXtremely-thin Leadframe Land Grid Array (XLLGA) sub-chipscale package technology.
Sub-Chipscale Packages
The XLLGA package features solderable metal contacts on the underside of the package, similar to DFN style packages, and has an innovative internal design allowing overall package dimensions less than those of a comparable chip-scale package.
Figure 4. The LLGA 3 0.62 x 0.62 x 0.4mm sub-chipscale leadless package.
Using the latest XLLGA3 3-lead sub-chipscale package (figure 3), which measures 0.62 x 0.62 x 0.4mm, ON Semiconductor’s NTNS3193NZ and NTNS3A91PZ are the industry’s most highly miniaturized discrete small-signal MOSFETs, having a total footprint of 0.38mm2. The N-channel NTNS3193NZ has a typical on resistance of 0.65Ω at ±4.5V gate-to-source voltage, while the NTNS3A91PZ P-channel device has 1.1Ω typical on resistance at ±4.5V. They are the smallest devices in ON Semiconductor’s family of 20V small-signal MOSFETs, which also includes devices in SOT563 (1.6×1.6×0.5mm), SOT723 (1.2 x 1.2 x 0.5mm), SOT963 (1.0 x 1.0 x 0.5mm) and SOT883 (1.0 x 0.6 x 0.4mm) packages.
Conclusion
As an increasing proportion of the world’s population becomes empowered by mobile technology, growing markets are expected to increase demand for extra performance and functionality. Product designers must rely on a combination of silicon advances and package technology improvement if they are to satisfy these demands within a short timeframe and ahead of their competitors. While Large-Scale Integration (LSI) continues to pursue Moore’s Law to integrate additional functionality in successive generations of mobile chipsets, new devices inevitably arrive in the market sometime after the demand has been identified.
To ensure the earliest market entry by developing successful designs with multiple standard ICs, designers must take advantage of innovations in small-signal discrete devices acting as the “glue” between key functional blocks. As each new chipset becomes available, the leading designs are already pursuing multi-chip implementations and driving further demands for sub-chipscale discrete MOSFETs.
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