Paying attention to power management prolongs battery life and increases performance by minimizing ripple/noise in the system.
By Bob Nguyen, National Semiconductor
Wireless technology implies the freedom to physically move around while still
remaining virtually connected. No longer attached to a wall outlet, electronic
wireless handset
click to enlarge Figure 1. Typical application circuit with DC/DC converter as Pre-Regulator for VIN. |
systems are forced to run off batteries. Regardless of chemistry type, all batteries
store a finite amount of energy before needing to either be replaced or recharged.
Paying attention to power management prolongs battery life. Wireless systems that
are not battery dependent, such as a base stations, value high performance while
still remaining conscious of power efficiency.
Depending on the application, performance can mean a number of things from highest data throughput with a low bit error rate to lowest power consumption within the smallest PCB footprint. When high performance means low power consumption, picking the right power management IC is important. Low power consumption leads to longer battery life in portable wireless communication applications and lower cost of ownership in off-line hardware such as telecom and networking equipment.
The following article discusses the importance of using a low dropout linear regulator (LDO) to improve performance and increase efficiency. Also discussed is the use of a buck switching regulator in systems with linear RF power amplifiers to maximize battery life in portable applications.
Broadly speaking there are two types of power management regulators: linear regulators
and switching regulators. A subcategory of linear regulators is low-dropout linear
regulators, also known as LDOs. Subcategories for switching regulators include
switched capacitors (aka charge pumps), step-down magnetic switching regulators
(aka bucks) and step-up magnetic switching regulator (aka boosts). All regulate
power so you have a clean supply but each have their trade-offs. A switching regulator
provides higher efficiency than a linear regulator. Low component count and no
external compensation make linear regulators an easy-to-use solution while providing
high performance by lowering the noise/ripple on the supply rail.
Increase Efficiency with Low Input/ Low Output LDO’s
The approximate efficiency of an LDO is a simple calculation: Vout/Vin where Vout
is the output voltage of the LDO and VIN is the input voltage to the LDO. As an
example powering a 1.5 V processor core from a 3.6 V lithium ion battery yields
an efficiency of 42% (1.5 V/3.6 V). The VOUT is often a fixed value when powering
a processor or other digital IC and the Vin is dependent on available power supply
rails in the system. If a 1.8 V rail is available in the system, the efficiency
would be 83%
click to enlarge Figure 2. LP5900 100 mA Low Dropout Linear Regulator PSRR over frequency. |
(1.5 V/1.8V). When a lower power rail is available, a dual rail LDO is a perfect
fit. Dual rail LDOs like the LP5952 have two input pins, one to power the internal
circuitry and another to power the load. Separating the input pins allows the
pass transistor to use the second lower voltage rail to power the load and increase
the efficiency from 42 to 83% as shown in the previous example. See Figure 1 for
the dual-rail typical application circuit with a buck switching regulator for
pre-regulation.
Select a Low Output Noise, High PSRR LDO to Improve Signal Path Performance
A major advantage of an LDO, besides its ease of use, is its inherent low noise
and ability to reject ripple on the power supply line. Lowering the noise and
ripple on the power supply will improve signal path performance. Noise or ripple
on the power supply can couple into the output of an op amp, increase jitter
on a phase-locked loop (PLL) or voltage-controlled oscillator (VCO) or degrade
the SNR in an ADC.
Noise and ripple on the power supply line can come from a number of sources.
High-speed data and high-frequency signals within the system itself create noise
because printed circuit board (PCB) traces and wiring elements can act like
an antenna if not carefully attended to. Digital ICs such as microcontrollers,
field programmable gate arrays (FPGA)’s and complex programmable logic
device’s (CPLD) have fast edge rates that draw varying amounts of current
and radiate electromagnetic interference (EMI) into the system. Silicon ICs
generate thermal noise internally which is caused by the random motion and collision
of molecules at temperatures above absolute zero Kelvin. As shown in Figure
1, the output of a switching regulator is also a noise source.
Three common ways to minimize noise and ripple in the signal path exist: careful
attention to system PCB layout, proper supply bypassing and choosing the right
power supply. Though system dependent, PCB layout considerations include proper
component placement, minimizing signal path trace length and having a solid
ground.
Bypassing the supply rail is a common practice, often recommended inside the
analog signal path IC’s datasheet to filter out noise. Signal path ICs
can have separate analog, digital and PLL power supply inputs, each with its
own suggested bypassing. The PLL supply and analog supplies are the most sensitive
to noise and ripple. Bypass capacitors, resistor-capacitor (RC) filters and
EMI suppression filters minimize noise and ripple into the signal path power
supply.
Choosing the right LDO to reduce noise and reject ripple comes down to two specifications:
power supply rejection ratio (PSRR) and output noise. PSRR is a ratio of the
ripple coming into the LDO to the ripple going out of the LDO and is measured
in dB. The equation for PSRR is:
dB = 20log10 V1/V2
where V1 is the change in input voltage and V2 is the change in output voltage.
Higher absolute value of PSRR means better ripple rejection (i.e. 60 dB is better
than 20 dB). Figure 2 shows the PSRR of the LP5900, a low noise LDO. PSRR is measured
over frequency; note that as frequency increases PSRR generally gets worse.
Output noise of an LDO is the sum of all internal LDO noise over a specified
bandwidth and is measured in µVrms. The lower the output noise value the
better. Output noise is primarily generated from the internal reference of the
LDO. Picking an LDO, such as the LP5900, with low noise and high PSRR LDO improves
signal path performance in the overall system.
Buck Switching Regulator with Linear RFPA’s
When the key power performance requirement is high efficiency, the best solution
is a switching regulator. In the example above, the efficiency of an LDO was increased
from
click to enlarge Figure 3. Power savings when a linear RFPA is powered by a buck switching regulator. |
42 to 83% through the use of an available lower power rail and a dual rail LDO.
As a comparison most switching regulators have efficiencies greater than 90%.
The use of a buck switching regulator designed for linear RF power amplifiers
(RFPA) is inherently efficient and will lower overall power consumption in the
system.
The RF power section of a handset can consume up to 65% of the power budget
when operating in transmit mode. Because many handsets are battery powered,
careful attention to powering this section will increase efficiency and battery
life.
The most straightforward method of powering a linear RFPA in a portable handset
is to connect the battery directly to the RFPA VCC pin. Though simple to design,
it’s an inefficient way to power the system. The second method is to connect
the battery to a buck regulator designed for linear RFPA. This will increase
efficiency in the overall system.
Multiple definitions for PA efficiency exist, but the one of concern to us is
power-added efficiency (PAE). The equation for PAE is:
PAE (%) = (POUT -PIN)/PDC
where POUT is the RF output power, PIN is the RF input drive and PDC is the DC
input power. Buck regulators reduce the DC input power, thus increasing PAE to
prolong battery life. In the straightforward method, PDCBATT =VBATT*IBATT. When
using a RFPA buck regulator PDC-BUCK =VOUT-BUCK*IOUT-BUCK. The ability to control
and lower the RFPA buck regulators’ VOUT-BUCK reduces PDC as compared to
a battery where the VBATT is constant. Power = Voltage*Current so lowering the
voltage lowers the power consumed.
Lowering the output voltage of the buck is dependent on the power probability
profile and maintaining the proper adjacent-channel power ratio (ACPR). ACPR characterizes
how
click to enlarge Figure 4. Operating circuit with a system controller DAC controlling the putput of the buck switching regulator. |
nonlinearity/distortion affects adjacent channels/systems. Lowering the output
voltage too low will violate a given designs ACPR requirement. When much of the
power probability density of the handsets is consumed at lower RF output power,
lowering the buck regulators VOUT reduces energy consumption. Figure 3 shows the
power savings when an RFPA is powered by a buck regulator.
A standard buck regulator may not meet the need to power an RFPA. Two key elements
when selecting the RFPA buck regulator are dynamic voltage adjustment and efficiency
over the operating range. Dynamic voltage adjustment refers to the ability to
dynamically adjust the buck’s voltage via access to the buck’s internal
error amplifier. Efficiency over operating range refers to the buck’s
efficiency over varying output voltages and currents. The LM3208 is a good example
of an RFPA buck because of its 90% efficiency when VOUT is between 2 to 3.6V
with 5 to 15 ohm loads. Figure 4 shows an example circuit where a system controller’s
DAC adjusts the buck switching regulators output voltage.
The above example used wireless communication handsets as an example but concepts
apply to a wide variety of PA applications such as WiFi, imaging, jamming and
radar.
In power management, the decision to use an LDO or a switching regulator basically
comes down to application needs and trade-offs. Selecting a low output noise,
high PSRR LDO will reduce noise and ripple in the system. Switching regulators
lower power consumption in linear RFPA applications.
About the Author
Bob Nguyen is design engineer, power management for National Semiconductor.